This is an undergraduate course in the area of computer organization and architecture. Centered around the RISC-V ISA, it is designed to cover basic concepts of computer organization and hardware; instructions executed by a processor and how to use these instructions in simple assembly language programs; stored-program concept; datapath and control for multiple implementations of a processor; performance evaluation, pipelining, caches, virtual memory, input/output and parallelism. Industry practices and advanced topics will be taught as optional contents for students who are willing to dive deeper into this field.
David Patterson and John Hennessy, Computer Organization and Design RISC-V Edition: The Hardware Software Interface 1st Edition, April 27, 2017, ISBN: 978-0128122754/0128122757
VE270 and VE280
- To introduce one of the most popular computer architectures in the current computer industry;
- To teach students how computers execute machine-level instructions;
- To teach students how to write assembly language programs and translate them to machine level instructions;
- To teach students how to design the datapath and control unit for pipelined and single-cycle processors;
- To teach students about data and control hazards;
- To teach students the principles of caches and memory;
- To teach students how processors, memory, and I/O are combined into a computer.